The present invention relates generally to semiconductor devices and their fabrication and, more particularly, to semiconductor devices and their manufacture involving techniques for analyzing and debugging circuitry within an integrated circuit.
The semiconductor industry has recently experienced technological advances that have permitted dramatic increases in circuit density and complexity, and equally dramatic decreases in power consumption and package sizes. Present semiconductor technology now permits single-chip microprocessors with many millions of transistors, operating at speeds of hundreds of millions of instructions per second to be packaged in relatively small, air-cooled semiconductor device packages. A by-product of such high-density and high functionality in semiconductor devices has been the demand for increased numbers of external electrical connections to be present on the exterior of the die and on the exterior of the semiconductor packages which receive the die, for connecting the packaged device to external systems, such as a printed circuit board.
To increase the number of pad sites available for a die, to reduce the electrical path to the pad sites, and to address other issues, various chip packaging techniques have been developed. One of these techniques is referred to as controlled collapse chip connection or xe2x80x9cflip-chipxe2x80x9d packaging. With packaging technology, bonding pads of the die include metal (solder) bumps. Electrical connection to the package is made when the die is xe2x80x9cflippedxe2x80x9d over and soldered to the package. Each bump connects to a corresponding package inner lead. The resulting packages are low profile and have low electrical resistance and a short electrical path. The output terminals of the package, which are sometimes ball-shaped conductive bump contacts, are typically disposed in a rectangular array. These packages are occasionally referred to as xe2x80x9cBall Grid Arrayxe2x80x9d (BGA) packages. Alternatively, the output terminals of the package may be pins and such packages are commonly known as pin grid array (PGA) packages.
Once the die is attached to such a package the back side portion of the die remains exposed. The transistors and other circuitry are generally formed in a very thin epitaxially-grown silicon layer on a single crystal silicon wafer from which the die is singulated. The side of the die including the epitaxial layer containing the transistors and other circuitry is often referred to as the circuit side or front side of the die. The circuit side of the die is positioned very near the package and opposes the back side of the die. Between the back side and the circuit side of the die is bulk silicon.
The positioning of the circuit side near the package provides many of the advantages of the flip chip. However, in some instances orienting the die with the circuit side face down on a substrate is disadvantageous. Due to this orientation of the die, the transistors and circuitry near the circuit side are not directly accessible for testing, modification or other purposes. Therefore, access to the transistors and circuitry near the circuit side is from the back side of the chip.
As the manufacturing processes for semiconductor devices and integrated circuits increase in difficulty, methods for testing and debugging these devices become increasingly important. Not only is it important to ensure that individual chips are functional, it is also important to ensure that batches of chips perform consistently. In addition, the ability to detect a defective manufacturing process early is helpful for reducing the number of defective devices manufactured. With flip-chip technology, these methods for testing and debugging often require accessing the circuitry through the back side.
One integrated circuit analysis method involves using a liquid crystal material for detecting defects from the front side of an integrated circuit. Liquid crystalline materials have both crystalline solid and liquid characteristics. These characteristics enable their use for thermally analyzing an integrated circuit for defects. When the liquid crystal material is heated, its properties change. One such example change is a color change, and another change is an ordering transition. Available defect analysis methods use the change as an indication of temperature in an integrated circuit, which is useful for detecting defects that cause heat generation. By forming a liquid crystal layer on an integrated circuit, the response of the liquid crystal can be monitored and used to detect hot spots that are an indication of a defect.
One type of liquid crystalline material useful for front side defect analysis is calamatic liquid crystal material having nematic ordering. Calamatic liquid crystals have long, rod-shaped molecules, and those having nematic ordering change under temperature variation from a nematic to an isotropic state. In the nematic state, the liquid crystal alters the polarization of light incident upon it. When the liquid crystal changes to an isotropic state, the polarization of incident light is no longer affected. This change in the effect upon incident light is used to detect a temperature change in the liquid crystal material. The transition temperature at which the change occurs is dependent upon the particular characteristics of the material.
Typical analysis methods that use liquid crystals involve forming a liquid crystal layer on an integrated circuit, heating the circuit with an external source, and observing a change in the state of the liquid crystal. The liquid crystal layer is often formed by adding a solvent, such as pentane, to the liquid crystal material and then applying the material to the surface of an integrated circuit device with an eyedropper. The solvent evaporates, leaving the liquid crystal material behind. Other liquid crystal application methods include applying liquid crystal with a spreading strip, and applying a drop of liquid crystal on the chip and spinning the chip to spread out the liquid crystal. In addition, a liquid crystal emulsion may be used in place of the liquid crystal mixed with a solvent.
Once the liquid crystal has been applied, the integrated circuit is then heated with an external heater. The heater is used to bring the integrated circuit to within about 0.1 Kelvin of the transition temperature of the liquid crystal material. A microscope is directed at the liquid crystal layer. A suitable microscope includes a polarized light source and a linear polarizer (analyzer) in front of an eyepiece or camera. The integrated circuit is electrically stimulated, thereby heating a defect in the circuit and raising the liquid crystal material over the defect to its transition temperature. The liquid crystal material changes from nematic to isotropic phase, which is evidenced by a dark spot that is detected by the microscope.
It would be beneficial to be able to use the state change properties of liquid crystal for back side analysis of flip chip dies including defect detection. However, it has been discovered that the heat dissipation throughout the backside is prohibitive to accurate use of liquid analysis via the backside, and that certain types of integrated circuits have internal intrinsic heat sources that tend to overwhelm defect-related heat sources. Typical intrinsic heat sources include fast-switching circuits such as phase lock loops (PLL) and crystal oscillators. Such heat sources generate heat during normal operation that is significantly greater than heat generated by surrounding circuitry. These intrinsic heat sources make liquid crystal analysis of defective integrated circuits via the back side even more difficult because the intrinsic heat causes the liquid crystal to change phase.
Addressing the above and other concerns, the present invention is directed to a method and system for analyzing the back side of a flip chip die involving defect detection using a liquid crystal layer. The defect detection can be used via the back side of the die, and can be used to detect defects located near intrinsic heat sources that make conventional liquid crystal analysis difficult or even impossible. The present invention is exemplified in a number of implementations and applications, some of which are summarized below.
According to an example embodiment of the present invention, a method is adapted for analyzing a flip chip die having a back side opposite circuitry at a circuit side. A flip chip die having a liquid crystal layer formed over a thinned region in the back side is provided for analysis. The thinned region is located in a manner that facilitates sufficient heat transfer to the liquid crystal layer to enable the detection of a defect using a liquid crystal phase change. The die is electrically operated, thereby generating heat in the die circuitry. The heat causes a phase change in the liquid crystal layer, and a defect in the die is detected by detecting a portion of the liquid crystal changing phase. In this manner, liquid crystal analysis can be used for back side analysis.
According to another example embodiment of the present invention, a system is adapted to analyze a flip chip semiconductor die having a back side opposite circuitry at a circuit side and a liquid crystal layer. The system includes an arrangement adapted to provide a flip chip die having the liquid crystal layer formed over a thinned region in the back side. An electrical power supply is adapted to power the die and generate heat in the die circuitry. A testing arrangement is adapted to detect a defect in the die as a portion of the liquid crystal changing phase.
The above summary of the present invention is not intended to describe each illustrated embodiment or every implementation of the present invention. The figures and detailed description that follow more particularly exemplify these embodiments.